NXP USA Inc.

HCS12 HCS12 Microcontroller IC 16-Bit 25MHz 512KB (512K x 8) FLASH 112-LQFP (20x20)

Overview

The MC9S12DP512 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip

peripherals including a 16-bit central processing unit (HCS12 CPU), 512K bytes of Flash EEPROM, 14K

bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), three

serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit

analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link

Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital

I/O lines with interrupt and wake up capability, five CAN 2.0 A, B software compatible modules

(MSCAN12), and an Inter-IC Bus. The MC9S12DP512 has full 16-bit data paths throughout. However,

the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for

lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be

adjusted to suit operational requirements.

Features

• HCS12 Core

– 16-bit HCS12 CPU

i. Upward compatible with M68HC11 instruction set

ii. Interrupt stacking and programmer’s model identical to M68HC11

iii.Instruction queue

iv. Enhanced indexed addressing

– MEBI (Multiplexed External Bus Interface)

– MMC (Module Mapping Control)

– INT (Interrupt control)

– BKP (Breakpoints)

– BDM (Background Debug Mode)

• CRG (Clock and Reset Generation)

– Low current Colpitts oscillator or

– Pierce oscillator

– PLL

– COP watchdog

– Real Time Interrupt

– Clock Monitor

• 8-bit and 4-bit ports with interrupt functionality

– Digital filtering

– Programmable rising or falling edge trigger

• Memory

– 512K Flash EEPROM

– 4K byte EEPROM

– 14K byte RAM

• Two 8-channel Analog-to-Digital Converters

– 10-bit resolution

– External conversion trigger capability

• Five 1M bit per second, CAN 2.0 A, B software compatible modules

– Five receive and three transmit buffers

– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

– Four separate interrupt channels for Rx, Tx, error and wake-up

– Low-pass filter wake-up function

– Loop-back for self test operation

• Enhanced Capture Timer

– 16-bit main counter with 7-bit prescaler

– 8 programmable input capture or output compare channels

– Four 8-bit or two 16-bit pulse accumulators

• 8 PWM channels

– Programmable period and duty cycle

– 8-bit 8-channel or 16-bit 4-channel

– Separate control for each pulse width and duty cycle

– Center-aligned or left-aligned outputs

– Programmable clock select logic with a wide range of frequencies

– Fast emergency shutdown input

– Usable as interrupt inputs

• Serial interfaces

– Two asynchronous Serial Communications Interfaces (SCI)

– Three Synchronous Serial Peripheral Interface (SPI)

• Byte Data Link Controller (BDLC)

– SAE J1850 Class B Data Communications Network Interface Compatible and ISO Compatible

for Low-Speed (<125 Kbps) Serial Data Communications in Automotive Applications

• Inter-IC Bus (IIC)

– Compatible with I2

C Bus standard

– Multi-master operation

– Software programmable for one of 256 different serial clock frequencies

• 112-Pin LQFP package

– I/O lines with 5V input and drive capability

– 5V A/D converter inputs

– Operation at 50MHz equivalent to 25MHz Bus Speed over -40˚C <= TA <= 125˚C

– Development support

– Single-wire background debug™ mode (BDM)

– On-chip hardware breakpoints

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CPU12 HC12 Microcontroller IC 16-Bit 8MHz 4KB (4K x 8) EEPROM 112-LQFP (20x20)

Introduction

The MC68HC812A4 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip

peripheral modules connected by an intermodule bus. Modules include:

• 16-bit central processor unit (CPU12)

• Lite integration module (LIM)

• Two asynchronous serial communications interfaces

(SCI0 and SCI1)

• Serial peripheral interface (SPI)

• Timer and pulse accumulator module

• 8-bit analog-to-digital converter (ATD)

• 1-Kbyte random-access memory (RAM)

• 4-Kbyte electrically erasable, programmable read-only memory (EEPROM)

• Memory expansion logic with chip selects, key wakeup ports, and a phase-locked loop (PLL)

Features

Features of the MC68HC812A4 include:

• Low-power, high-speed M68HC12 CPU

• Power-saving stop and wait modes

• Memory:

– 1024-byte RAM

– 4096-byte EEPROM

– On-chip memory mapping allows expansion to more than 5-Mbyte address space

• Single-wire background debug mode

• Non-multiplexed address and data buses

• Seven programmable chip-selects with clock stretching (expanded modes)

• 8-channel, enhanced 16-bit timer with programmable prescaler:

– All channels configurable as input capture or output compare

– Flexible choice of clock source

• 16-bit pulse accumulator

• Real-time interrupt circuit

• Computer operating properly (COP) watchdog

• Clock monitor

• Phase-locked loop (PLL)

• Two enhanced asynchronous non-return-to-zero (NRZ) serial communication interfaces (SCI)

• Enhanced synchronous serial peripheral interface (SPI)

• 8-channel, 8-bit analog-to-digital converter (ATD)

• Up to 24 key wakeup lines with interrupt capability

• Available in 112-lead low-profile quad flat pack (LQFP) packaging

HCS12 HCS12 Microcontroller IC 16-Bit 25MHz 64KB (64K x 8) FLASH 80-QFP (14x14)

MC9S12E128 

covers

MC9S12E64 & MC9S12E32

Introduction

The MC9S12E128 is a 112/80/64 pin low cost general purpose MCU comprised of standard on-chip

peripherals including a 16-bit central processing unit (HCS12 CPU), up to 128K bytes of Flash EEPROM,

up to 8K bytes of RAM, three asynchronous serial communications interface modules (SCI), a serial

peripheral interface (SPI), an Inter-IC Bus (IIC), three 4-channel 16-bit timer modules (TIM), a 6-channel

15-bit Pulse Modulator with Fault protection module (PMF), a 6-channel 8-bit Pulse Width Modulator

(PWM), a 16-channel 10-bit analog-to-digital converter (ADC), and two 1-channel 8-bit digital-to-analog

converters (DAC). The MC9S12E128 has full 16-bit data paths throughout. The inclusion of a PLL circuit

allows power consumption and performance to be adjusted to suit operational requirements. In addition to

the I/O ports available on each module, 16 dedicated I/O port bits are available with Wake-Up capability

from STOP or WAIT mode. Furthermore, an on chip bandgap based voltage regulator (VREG) generates

the internal digital supply voltage of 2.5V (VDD) from a 3.135V to 5.5V external supply range.

Features

• 16-bit HCS12 CORE

— HCS12 CPU

– i. Upward compatible with M68HC11 instruction set

– ii. Interrupt stacking and programmer’s model identical to M68HC11

– iii. Instruction queue

– iv. Enhanced indexed addressing

— Module Mapping Control (MMC)

— Interrupt control (INT)

— Background Debug Module (BDM)

— Debugger (DBG12) including breakpoints and change-of-flow trace buffer

— Multiplexed External Bus Interface (MEBI)

• Wake-Up interrupt inputs

— Up to 16 port bits available for wake up interrupt function with digital filtering

• Memory Options

— 32K, 64K or 128K Byte Flash EEPROM

— 2K, 4K or 8K Byte RAM

• Two 1-channel Digital-to-Analog Converters (DAC)

— 8-bit resolution

• Analog-to-Digital Converter (ADC)

— 16-channel module with 10-bit resolution

— External conversion trigger capability

• Three 4-channel Timers (TIM)

— Programmable input capture or output compare channels

— Simple PWM mode

— Counter modulo reset

— External event counting

— Gated time accumulation

• 6 PWM channels (PWM)

— Programmable period and duty cycle

— 8-bit 6-channel or 16-bit 3-channel

— Separate control for each pulse width and duty cycle

— Center-aligned or left-aligned outputs

— Programmable clock select logic with a wide range of frequencies

— Fast emergency shutdown input

• 6-channel Pulse width Modulator with Fault protection (PMF)

— Three independent 15-bit counters with synchronous mode

— Complementary channel operation

— Edge and center aligned PWM signals

— Programmable dead time insertion

— Integral reload rates from 1 to 16

— Four fault protection shut down input pins

— Three current sense input pins

• Serial interfaces

— Three asynchronous serial communication interfaces (SCI)

— Synchronous serial peripheral interface (SPI)

— Inter-IC Bus (IIC)

• Clock and Reset Generator (CRG)

— Windowed COP watchdog

— Real Time interrupt

— Clock Monitor

— Pierce or low current Colpitts oscillator

— Phase-locked loop clock frequency multiplier

— Self Clock mode in absence of external clock

— Low power 0.5 to 16Mhz crystal oscillator reference clock

• Operating frequency

— 50MHz equivalent to 25MHz Bus Speed

• Internal 2.5V Regulator

— Input voltage range from 3.135V to 5.5V

— Low power mode capability

— Includes low voltage reset (LVR) circuitry

— Includes low voltage interrupt (LVI) circuitry

• 112-Pin LQFP or 80-Pin QFP or 64-Pin QFN package

— Up to 90 I/O lines with 5V input and drive capability (112 pin package)

— Up to two dedicated 5V input only lines (IRQ and XIRQ)

— Sixteen 3.3V/5V A/D converter inputs

• Development Support.

— Single-wire background debugTM mode

— On-chip hardware breakpoints

— Enhanced debug features

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