NXP USA Inc.

S12 HCS12 Microcontroller IC 16-bit 25MHz 96KB(96K x 8) Flash 48-LQFP(7x7)

Introduction

The MC9S12G-Family is an optimized, automotive, 16-bit microcontroller product line focused on

low-cost, high-performance, and low pin-count. This family is intended to bridge between high-end 8-bit

microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS-Family. The

MC9S12G-Family is targeted at generic automotive applications requiring CAN or LIN/J2602

communication. Typical examples of these applications include body controllers, occupant detection, door

modules, seat controllers, RKE receivers, smart actuators, lighting modules, and smart junction boxes.

The MC9S12G-Family uses many of the same features found on the MC9S12XS- and MC9S12P-Family,

including error correction code (ECC) on flash memory, a fast analog-to-digital converter (ADC) and a

frequency modulated phase locked loop (IPLL) that improves the EMC performance. 

The MC9S12G-Family is optimized for lower program memory sizes down to 16k. In order to simplify

customer use it features an EEPROM with a small 4 bytes erase sector size.

The MC9S12G-Family deliver all the advantages and efficiencies of a 16-bit MCU while retaining the low

cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed by users of NXP’s

existing 8-bit and 16-bit MCU families. Like the MC9S12XS-Family, the MC9S12G-Family run 16-bit

wide accesses without wait states for all peripherals and memories. The MC9S12G-Family is available in

100-pin LQFP, 64-pin LQFP, 48-pin LQFP/QFN, 32-pin LQFP and 20-pin TSSOP package options and

aims to maximize the amount of functionality especially for the lower pin count packages. In addition to

the I/O ports available in each module, further I/O ports are available with interrupt capability allowing

wake-up from stop or wait modes.

Chip-Level Features

On-chip modules available within the family include the following features:

• S12 CPU core

• Up to 240 Kbyte on-chip flash with ECC

• Up to 4 Kbyte EEPROM with ECC

• Up to 11 Kbyte on-chip SRAM

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 4–16 MHz amplitude controlled Pierce oscillator

• 1 MHz internal RC oscillator

• Timer module (TIM) supporting up to eight channels that provide a range of 16-bit input capture,

output compare, counter, and pulse accumulator functions

• Pulse width modulation (PWM) module with up to eight x 8-bit channels

• Up to 16-channel, 10 or 12-bit resolution successive approximation analog-to-digital converter

(ADC)

• Up to two 8-bit digital-to-analog converters (DAC)

• Up to one 5V analog comparator (ACMP)

• Up to three serial peripheral interface (SPI) modules

• Up to three serial communication interface (SCI) modules supporting LIN communications

• Up to one multi-scalable controller area network (MSCAN) module (supporting CAN protocol

2.0A/B)

• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages

• Autonomous periodic interrupt (API)

• Precision fixed voltage reference for ADC conversions

• Optional reference voltage attenuator module to increase ADC accuracy

HCS12 HCS12 Microcontroller IC 16-Bit 25MHz 256KB (256K x 8) FLASH 112-LQFP (20x20)

Introduction

The MC9S12E256 is a 112/80 pin low cost general purpose MCU comprised of standard on-chip

peripherals including a 16-bit central processing unit (HCS12 CPU), 256K bytes of Flash EEPROM, 16K

bytes of RAM, three asynchronous serial communications interface modules (SCI), a serial peripheral

interface (SPI), an Inter-IC Bus (IIC), three 4-channel 16-bit timer modules (TIM), a 6-channel 15-bit

Pulse Modulator with Fault protection module (PMF), a 6-channel 8-bit Pulse Width Modulator (PWM),

a 16-channel 10-bit analog-to-digital converter (ADC), and two 1-channel 8-bit digital-to-analog

converters (DAC). The MC9S12E256 has full 16-bit data paths throughout. The inclusion of a PLL circuit

allows power consumption and performance to be adjusted to suit operational requirements. In addition to

the I/O ports available on each module, 16 dedicated I/O port bits are available with Wake-Up capability

from STOP or WAIT mode. Furthermore, an on chip bandgap based voltage regulator (VREG) generates

the internal digital supply voltage of 2.5V (VDD) from a 2.97V to 5.5V external supply range.

Features

• 16-bit HCS12 CORE

— HCS12 CPU

– Upward compatible with M68HC11 instruction set

– Interrupt stacking and programmer’s model identical to M68HC11

– Instruction queue

– Enhanced indexed addressing

— Module Mapping Control (MMC)

— Interrupt control (INT)

— Background Debug Module (BDM)

— Debugger (DBG12) including breakpoints and change-of-flow trace buffer

— Multiplexed External Bus Interface (MEBI)

• Wake-Up interrupt inputs

— Up to 16 port bits available for wake up interrupt function with digital filtering

• Memory

— 256K Byte Flash EEPROM

— 16K Byte RAM

• Two 1-channel Digital-to-Analog Converters (DAC)

— 8-bit resolution

• Analog-to-Digital Converter (ADC)

— 16-channel module with 10-bit resolution

— External conversion trigger capability

• Three 4-channel Timers (TIM)

— Programmable input capture or output compare channels

— Simple PWM mode

— Counter modulo reset

— External event counting

— Gated time accumulation

• 6 PWM channels (PWM)

— Programmable period and duty cycle

— 8-bit 6-channel or 16-bit 3-channel

— Separate control for each pulse width and duty cycle

— Center-aligned or left-aligned outputs

— Programmable clock select logic with a wide range of frequencies

— Fast emergency shutdown input

• 6-channel Pulse width Modulator with Fault protection (PMF)

— Three independent 15-bit counters with synchronous mode

— Complementary channel operation

— Edge and center aligned PWM signals

— Programmable dead time insertion

— Integral reload rates from 1 to 16

— Four fault protection shut down input pins

— Three current sense input pins

• Serial interfaces

— Three asynchronous serial communication interfaces (SCI)

— Synchronous serial peripheral interface (SPI)

— Inter-IC Bus (IIC)

• Clock and Reset Generator (CRG)

— Windowed COP watchdog

— Real Time interrupt

— Clock Monitor

— Pierce or low current Colpitts oscillator

— Phase-locked loop clock frequency multiplier

— Self Clock mode in absence of external clock

— Low power 0.5 to 16Mhz crystal oscillator reference clock

• Operating frequency

— 50MHz equivalent to 25MHz Bus Speed

• Internal 2.5V Regulator

— Input voltage range from 2.97V to 5.5V

— Low power mode capability

— Includes low voltage reset (LVR) circuitry

— Includes low voltage interrupt (LVI) circuitry

• 112-Pin LQFP or 80-Pin QFP package

— Up to 90 I/O lines with 5V input and drive capability (112 pin package)

— Up to two dedicated 5V input only lines (IRQ and XIRQ)

— Sixteen 3.3V/5V A/D converter inputs

• Development Support.

— Single-wire background debugTM mode

— On-chip hardware breakpoints

— Enhanced debug features

NXP Electronics components unboxing，humidity card changed color chip can used？

S12Z S12 MagniV Microcontroller IC 16-Bit 32MHz 64KB (64K x 8) FLASH 48-LQFP (7x7)

Introduction

The MC9S12ZVC-Family is a new member of the S12 MagniV product line integrating a battery level

(12V) voltage regulator, supply voltage monitoring, high voltage inputs and a CAN physical interface. It's

primarily targeting at CAN nodes like sensors, switch panels or small actuators. It offers various

low-power modes and wakeup management to address state of the art power consumption requirements.

Some members of the MC9S12ZVC-Family are also offered for high temperature applications requiring

AEC-Q100 Grade 0 (-40℃ to +150C ambient operating temperature range).

The MC9S12ZVC-Family is based on the enhanced performance, linear address space S12Z core and

delivers an optimized solution with the integration of severalkey system components into a single device,

optimizing system architecture and achieving significant space savings.

Chip-Level Features

•On-chip modules available within the family include the following features:

•S12Z CPU core

•Up to 192 Kbyte on-chip flash with ECC

•Up to 2 Kbyte EEPROM with ECC

•Up to 12Kbyte on-chip SRAM with ECC

•Phase locked loop (IPLL) frequency multiplier with internal filter

•1 MHz internalRC oscillator with +/-1.3% accuracy over rated temperature range

•4-20MHz amplitude controlled pierce oscillator

•Internal COP (watchdog) module

•Analog-to-digital converter (ADC) with 12-bit resolution and up to 16 channels available on

external pins

•Two analog comparators (ACMP) with rail-to-rail inputs

•One 8-bit 5V digital-to-analog converter (DAC)

•Up to two serial peripheral interface (SPI) modules

•Up to two serial communication interface (SCI) modules

•SENT Transmitter Interface

•MSCAN (1 Mbit/s, CAN 2.0 A, B software compatible) module

•One on-chip CAN physicallayer module

•8-channel timer module (TIM0) with input capture/output compare

•4-channel timer module (TIM1) with input capture/output compare (fast max 64MHz)

•Inter-IC (IIC) module

•4-channel 16-bit Pulse Width Modulation module (PWM0)

•4-channe1 16-bit Pulse Width Modulation module (PWM1) (fast max 64MHz)

•On-chip voltage regulator (VREG) for regulation of input supply and all interal voltages

•Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode

•Four pins to support 25 mA drive strength to VSSX

•One pin to support 20 mA drive strength from VDDX (EVDD)

•Two High Voltage Input (HVI) pins

•Supply Vsup monitoring with warning

•On-chip temperature sensor, temperature value can be measured with ADC or can generate a high

temperature interrupt