A Comprehensive Guide To EX64-PTQ100I EX Field Programmable Gate Array (FPGA) IC 56 128 100-LQFP

EX Field Programmable Gate Array (FPGA) IC 56 128 100-LQFP

General Description

The eX family of FPGAs is a low-cost solution for low-power, high-performance designs. The inherent low power

attributes of the antifuse technology, coupled with an additional low static power mode, make these devices ideal for

power-sensitive applications. Fabricated with an advanced 0.22 mm CMOS antifuse technology, these devices achieve

high performance with no power penalty.

Features and Benefits

• Leading Edge Performance

      240 MHz System Performance

      350 MHz Internal Performance

      3.9 ns Clock-to-Out (Pad-to-Pad)

• Specifications

      3,000 to 12,000 Available System Gates

      Maximum 512 Flip-Flops (Using CC Macros)

      0.22 µm CMOS Process Technology

      Up to 132 User-Programmable I/O Pins

• Features

      High-Performance, Low-Power Antifuse FPGA

      LP/Sleep Mode for Additional Power Savings 

      Advanced Small-Footprint Packages

      Hot-Swap Compliant I/Os

      Single-Chip Solution

      Nonvolatile

      Live on Power-Up

      No Power-Up/Down Sequence Required for Supply

• Voltages

      Configurable Weak-Resistor Pull-Up or Pull-Down for

• Tristated Outputs during Power-Up

      Individual Output Slew Rate Control

      2.5 V, 3.3 V, and 5.0 V Mixed-Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength

      Software Design Support with Microsemi Designer and Libero® Integrated Design Environment (IDE) Tools

      Up to 100% Resource Utilization with 100% Pin Locking 

      Deterministic Timing

      Unique In-System Diagnostic and Verification Capability

• with Silicon Explorer II

      Boundary Scan Testing in Compliance with IEEE

• Standard 1149.1 (JTAG)

      Fuselock™ Secure Programming Technology Designed to Prevent Reverse Engineering and Design Theft

How to choose FPGA for your project?

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