T8Q144I4

Trion® Field Programmable Gate Array (FPGA) IC 97 125829 7384 144-LQFP

Description

T8 FPGAs feature an eXchangeable Logic and Routing (XLR) cell that Efinix has optimized

for a variety of applications. Trion® FPGAs contain three building blocks constructed from

XLR cells: logic elements, embedded memory blocks, and multipliers. Each FPGA in the

Trion®

 family has a custom number of building blocks to fit specific application needs. As

shown in the following figure, the FPGA includes I/O ports on all four sides, as well as

columns of XLR cells, memory, and multipliers. A control block within the FPGA handles

configuration.

Features

• High-density, low-power Quantum™ architecture

• Built on SMIC 40 nm process

• Less than 150 μA typical core leakage current at 1.1 V(1)

• Ultra-small footprint package options

• FPGA interface blocks

— GPIO

— PLL

— LVDS 600 Mbps per lane with up to 6 TX pairs and 6 RX pairs(2)

— Oscillator

• Programmable high-performance I/O

— Supports 1.8, 2.5, and 3.3 V single-ended I/O standards and interfaces(3)

• Flexible on-chip clocking

— 12 low-skew global clock signals can be driven from off-chip external clock signals or

PLL synthesized clock signals

— PLL support

• Flexible device configuration

— Standard SPI interface (active, passive, and daisy chain)

— JTAG interface

— Optional Mask Programmable Memory (MPM) capability

• Fully supported by the Efinity®

 software, an RTL-to-bitstream compiler

How to choose FPGA for your project?

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